The inventive concept relates to semiconductor memory devices, and particularly to flash memory systems. Still more particularly, the inventive concept relates to flash memory systems including an abnormal wordline detector and/or capable of executing a method of abnormal wordline detection.
Semiconductor memories may be classified as volatile or nonvolatile according to their operative nature. Volatile memories lose stored data in the absence of applied power, while nonvolatile memories are able to retain stored data under similar circumstances. Volatile memories include the Dynamic Read Only Memory (DRAM), the Static RAM (SRAM), and similar memories. Nonvolatile memories include the Electrically Erasable/Programmable Read Only Memory (EEPROM) including so-called flash memory, the Phase-change RAM (PRAM), the Magnetic RAM (MRAM), the Ferroelectric RAM (FRAM), and the like.
Among the other types of nonvolatile memories, flash memory enjoys considerable commercial success and is widely used in many different applications. Flash memory is characterized by high read data access, low power consumption, and large data storage density and size. Thus, flash memory has been incorporated into many contemporary memory system (hereafter referred to as a “flash memory system”).
The constituent flash memory cells of a flash memory system are programmed to store data in accordance with a set of defined threshold voltage distributions. Ideally, each flash memory cell will exhibit, upon interrogation during a read operation, a particular threshold voltage that falls within the threshold voltage distribution associated with the program data stored during a “normal” program operation (i.e., a program operation that is executed within prescribed conditions with appropriate memory cell programming outcomes). However, practical memory system operating conditions—such as a sudden power-off of the flash memory system, certain memory system noise effects, and the like may distort (that is, undesirably change) the threshold voltage of one or more flash memory cells. Such conditions may be generally referred to as “abnormal.” Abnormal conditions for a flash memory system will often result in the generation of one or more data errors (or “fail bits”) among flash memory cells being programmed, erased, and/or read. Fail bits require remediation and generally slow the overall operation of the flash memory system. In extreme cases, fail bits degrade the reliability of stored data.
In order to avoid data degradation and/or memory system slowness, it is desirable to detect and remedy abnormal operating condition(s) potentially effecting memory system performance as soon as possible.